The present invention relates to data processors for generating spread codes which are utilized for spreading and despreading the data in CDMA (Code Division Multiple Access) system, data transmitters, data receivers and data communication systems utilizing such data processors, methods of data processing in such data processors, and data recording media in which programs for causing computers to execute such data processing methods are stored.
A CDMA system is a well-known data communication technique. In the CDMA data communication system, the data transmitter modulates communication data with spread codes, such as PN (Psuedo Noise) codes to despread the frequency band of the data to several to several ten times before transmitting the data. The data receiver demodulates the received communication data through despreading with the same spread codes.
Such a CDMA system data communication system has a merit that the S/N (signal-to-noise) ratio is satisfactory because noise irrelevant to the spread codes is not modulated. Another merit of the system is that the confidential property is satisfactory because the receiving side cannot demodulate communication data unless the spread codes are the same as those on the transmitting side.
With different spread codes, it is possible to let a plurality of different communication data be coexistent in the same frequency band, thus obtaining high data transmission band utilization efficiency of data communication. However, it has also been proposed a technique of permitting further effective utilization of the data transmission band of such a CDMA system by permitting variation of the spread bandwidth according to the chip rate of communication data.
In the above CDMA system data communication system, unless the spread codes in the data transmitter and those in the data receiver are coincident, the data receiver cannot despread communication data which has been obtained by the spreading in the data transmitter. Accordingly, the spread codes in the data transmitter and those in the data receiver are synchronized to one another.
In this case, the data transmitter first successively changes the phases of the spreading codes to synchronize the phases with those of the spreading codes in the data receiver, and subsequently synchronization is maintained such that the data transmitter and the data receiver cause recurrence of spreading codes of the same series in a fixed cycle. As an example of data processor which utilizes such spreading codes, a data receiver disclosed in Japanese Laid-Open Patent Publication No. 4-192733 will now be described with reference to FIG. 2.
The illustrated data receiver 1 has an input terminal 2, to which spread spectrum communication data is coupled. The input terminal 2 is connected to one of pair input terminals of a despread circuit 3. The data receiver 1 also has a first and a second counter 4 and 5 connected in sequence. The second counter 5 is connected to a reset terminal of a shift register 6 for generating spreading codes.
The shift register 6 is connected to the other one of the pair input terminals of the despreading circuit 3. A bandpass filter 7 is connected to an output terminal of the despreading circuit 3. A despread communication data output terminal 8 and a correlator 9 for checking the correlation of transmitting and receiving side spreading codes are connected to the band-pass filter 7. A controller 10 constituted by a micro-computer is connected to the correlator 9. A clock generator 11 constituted by a voltage-controlled oscillator is commonly connected to the first and second counters 4 and 5 and the shift register 6.
When the communication data transmitted as spectrum spread modulation thereof with spreading codes from a data transmitter (not shown), the data receiver 1 having the above construction receives the transmitted communication data, and demodulates the data through the despread thereof with the same spreading codes.
The first and second counters 4 and 5 and the shift register 6 are operated in synchronism to a reference clock generated by the clock generator 11, and the first counter 4 counts reference clock pulses from the clock generator 11 and outputs a pulse signal corresponding to the recurrence cycle of the spreading codes.
The controller 10 outputs initial count value for spreading code recurrence start timing control to the second counter 5. The second counter 5 receives the initial count (value) from the controller 10 based on the pulse signal fed from the first counter 4.
The second counter 5 counts reference clock pulses from the initial count input, and feeds a reset signal corresponding to the recurrence cycle of the spreading codes to the shift register 6. The shift register 6 is reset by the reset signal to start generation of recurrence spreading codes. With the spreading codes, the recurrence of which is started at a particular timing, the despreading circuit 3 demodulates the spread data by the despreading.
The demodulated communication data is filtered through the band-pass filter 7 and then fed to the correlator 9. The correlator 9 checks the correlation of the spreading codes of the data transmitter and data receiver. On the basis of the check, the controller 10 generates the initial count data.
In the data receiver 1 as described, the phase of the recurrence spreading codes can be updated as desired, because the spreading code recurrence start timing is changed on the basis of the initial count data generated from the controller 10.
However, in the above data receiver 1 the spreading code recurrence start timing is generated on the basis of the counts of the two counters 4 and 5. Therefore, the reset timing of the shift register 6 is changed when a count error is generated in at least one of these counters 4 and 5.
Such reset timing change may occur particularly with a long spreading code series. In such a case, the spreading code recurrence start timing is also changed, thus resulting in failure of coincidence of the spreading codes of the data receiver 1 and the data transmitter, and making it impossible to decode the communication data.
As noted before, it has been proposed to vary the spectrum spread bandwidth in a CDMA system data communication system by varying the length of the spreading code series according to the chip rate of communication data. However, it is difficult to apply this to the above data receiver 1.
More specifically, in the above data receiver 1 the first counter 4 controls the timing when the second counter 5 receives the initial count data, and the number of stages of the second counter 5 represents the length of the spreading code series. In order to update the length of the spreading code series, it is necessary to control the counts of both the first and second counters 4 and 5. This control is cumbersome and dictates complicated circuitry.
Besides, in the above data receiver 1 updating of the counts of both the first and second counters 4 and 5 is necessary when synchronizing the phase of recurrence of the spreading codes to the received communication data. Therefore, the synchronization of the spreading codes is delayed. Such a delay is pronounced in the case of high communication data chip rate and long spreading code series. In actual communication, this results in failure of demodulation of forefront part of the communication data.